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On the Design of a Photonic Network-on-Chip

qishuiyouyou 添加于 2010-4-2 12:58 | 1829 次阅读 | 0 个评论

作者
Shacham A, Bergman K, Carloni LP
摘要
Recent remarkable advances in nanoscale silicon-photonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the unique capabilities of optical technologies in the on-chip communications infrastructure. Based on these nano-photonic building blocks, we consider a photonic network-on-chip architecture designed to exploit the enormous transmission bandwidths, low latencies, and low power dissipation enabled by data exchange in the optical domain. The novel architectural approach employs a broadband photonic circuit-switched network driven in a distributed fashion by an electronic overlay control network which is also used for independent exchange of short messages. We address the critical network design issues for insertion in chip multiprocessors (CMP) applications, including topology, routing algorithms, path-setup and tear-down procedures, and deadlock avoidance. Simulations show that this class of photonic networks-on-chip offers a significant leap in the performance for CMP intrachip communication systems delivering low-latencies and ultra-high throughputs per core while consuming minimal power
详细资料
- 文献种类: Conference
- 会议: First International Symposium on Networks-on-Chip
- 期卷页: 2007年 53-64页
- 出版社: IEEE
- 位置: Princeton, NJ, USA
- 日期: 2007-05
- ISBN: 0-7695-2773-6
学科领域信息系统 » 电子通信
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